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NVIDIA nForce Preview
By: Mike Chambers - June 4, 2001

NVIDIA nForce Motherboard Chipset

Today marks a turning point for NVIDIA as they announce their entry into the motherboard chipset market with the nForce. NVIDIA has taken a building block approach in developing the nForce chipset which represents a culmination of work on graphics processing units for the personal computer and the system architecture for the Xbox game console.

Realizing that personal computers continue to suffer performance bottlenecks, NVIDIA’s nForce Platform Processing Architecture addresses the issues in this area. While this article serves as a preview and the architecture looks great on paper, initial performance results have been positive. But will it be enough to compete with AMD processor based chipsets developed by AMD and Via?

nForce Reference Motherboard
Click to Enlarge - 194KB

NVIDIA thinks so as they've been able to squeeze out more performance from AMD's Athlon and Duron processors. And with the nForce Platform Processing Architecture you'll see how overall system performance will improve compared to existing AMD based motherboard chipsets.

nForce Platform Processing Architecture

The key components of the nForce Platform Processing Architecture consist of the following technologies:

  • Designed around a distributed processing platform, freeing up the CPU to perform other important tasks.


  • Integration of NVIDIA’s patent-pending system, memory, and networking technologies to improve processing efficiency and overall performance.


  • The integrated Graphics Processing Unit (GPU) and Audio Processing Unit (APU) provide 3D graphics and audio.


  • A complete suite of networking and communications technologies, including 10/100Base-T Ethernet and home phone-line networking (HomePNA 2.0)

nForce Platform Processing Architecture

Click to Enlarge - 103KB

Clicking on the above image will provide a clearer picture of the components that make up the nForce. The Integrated Graphics Port (IGP) consists of a GeForce2 graphics processing unit, TwinBank 128-bit memory architecture, and the dynamic adaptive speculative pre-processor (DASP).

Note that an AGP graphics card, such as a GeForce3, can continue to be used on motherboards with the nForce chipset. If an external graphics card is detected, the on-board graphics processor will automatically disable itself.

nForce IGP Features

Click to Enlarge - 69KB

The heart of the Medial Communitcations Processor (MCP) is the Audio Processing Unit (APU) which includes a Dolby Digital 5.1 real-time encoder and StreamThru technology for enhanced data streaming. The MCP supports traditional features such as 10/100 Ethernet, HomePNA 2.0, ATA-100, and USB. The nForce IGP and MCP have built-in support for AMD's HyperTransport interconnect technology.

nForce MCP Features

Click to Enlarge - 71KB

TwinBank Architecture

TwinBank is the memory bandwidth traffic cop for the nForce and is based on a crossbar memory architecture reminiscent of the crossbar archtecture on the GeForce3. TwinBank is comprised of a 128-bit memory controller supporting PC-2100 (PC-266) Double Data Rate (DDR) SDRAM which is shared between the CPU, GPU and MCP.

Unlike traditional shared memory architectures, TwinBank uses two independent 64-bit memory controllers (MC0 and MC1 in the following diagram) to deliver up to 4.2GB/sec. of peak memory bandwidth. The crossbar memory controller allows the CPU and GPU to concurrently access the two 64-bit memory banks.

TwinBank Crossbar Memory Architecture

Click to Enlarge - 119KB

The two memory controllers are interleaved such that consecutive CPU memory requests can be started before the previous request is completed which reduces CPU read latency. The two independent 64-bit memory controllers can access 128-bits of data on each clock cycle using DDR memory, effectively fetching 256-bits of data total on each clock cycle.

The TwinBank memory architecture was designed to provide a high degree of flexibility for motherboard manufacturers:

  • Both 64-bit and 1 28-bit operations. In 64-bit mode, the DIMM can be located on either MC1 or MC2. In 1 28-bit mode, both MC1 (DIMM0) and MC2 (DIMM 1/DIMM2) are utilized.


  • Both controllers are functionally identical with all control and timing parameters independently programmable. This allows asymmetric DIMMs with different memory organization, size, and speed to be used on MC1 and MC2 and still provide the full performance benefits of the 128-bit memory system.


  • Support for both 3.3V standard SDRAM or 2.5V DDR SDRAM memory technologies.


  • Support for 133/100MHz DDR (266/200MHz) SDRAM or 133/100MHz standard SDRAM clock frequencies
  • .

  • Support for 1-3 unbuffered, non-ECC DIMMs.


  • Support for 64, 128, 256, or 512Mbit x8 or x16 memory configurations.


  • Support for 64MB to 1.5GB of system memory.

  • Support for odd total memory sizes; eg. 64MB + 128MB = 192MB, while still taking advantage of the 128-bit TwinBank architecture.
Dynamic Adaptive Speculative Pre-Processor

To further enhance the performance of AMD processors, NVIDIA has implemented an intelligent agent that monitors CPU requests and looks for access patterns that it can successfully predict. This technology is referred to as the Dynamic Adaptive Speculative Pre-Processor or DASP.

Similar in operation to a processor memory cache, the DASP recognizes access patterns and exploits unused memory bandwidth to load its cache with data that the CPU is expected to request later. If the CPU requests the data, it's returned via the DASP rather than accessing system memory.

nForce DASP Schematic

DASP employs a patent-pending intelligent multi-datapath prediction/prefetching technology. It can track multiple unrelated streams of data requests and uses a proprietary selection process to select candidate cache lines to read into an on-die cache. The DASP's pipelined architecture provides concurrent read/write operations from/to the cache respectively.

Audio Processing Unit

The Audio Processing Unit is a multi-processor engine which provides hardware audio acceleration for both output streams (playback) and input streams (record).

The APU is divided into four main sections:

  • Setup Engine – This unit is responsible for performing all data and parameter setup for the other processors. All memory management, mapping and DMA resources are controlled in this unit.


  • Voice Processor – This unit contains several fixed function digital signal processing (DSP) units responsible for processing voices and mixing the results in the mixer buffers.


  • Global Processor – This unit is built around a programmable DSP. The DSP is responsible for adding varied effects to the data in the mixer buffers and producing the final output stream to the OS.

Audio Features Comparison

Click to Enlarge - 29KB

The Dolby Digital Interactive Content Encoder is built around a programmable DSP, which encodes Dolby Digital (AC-3) audio streams. Using the SPDIF connection, an impressive home theater system can be assembled (see figure below).

nForce APU System Configuration

Click to Enlarge - 83KB

With five DSPs (three fixed, two programmable) dedicated to audio processing, the nForce APU supports the latest features in the DirectX 8 audio API. Up to 256 hardware-processed voices (audio streams) or 64 hardware voices in 3D are supported.

StreamThru Networking/Broadband Architecture

The StreamThru networking architecture is based on an isochronous transport system which ensures that data is delivered within certain time constraints. The nForce-integrated 10/100 Media Access Controller (MAC) is interfaced to an isochronous-aware internal bus, AMD's HyperTransport link controller, and a single-step arbiter.

The HyperTransport link between the IGP and MCP supports multiple virtual channels of isochronous data streams.

StreamThru Architecture

The HyperTransport link controller on the IGP side will dispatch both ISO and non-ISO requests to an intelligent arbiter, which guarantees memory latency and bandwidth delivery. The result is improved package transfers, data downloads, and media streaming which requires data to be delivered as fast as it's displayed and to ensure that the audio and video are synchronized.

Final Words

During our conference with NVIDIA we learned that the nForce will be marketed towards the mainstream consumer market. With that being the case, I would expect the intergated graphics to perform between the level of a GeForce2 MX 200 and 400. That's not necessarily a bad thing as the nForce should easily outperform existing integrated graphics solutions. And considering that an nForce based motherboard can be outfitted with a GeForce3, then you have what appears to be an impressive gaming system.

What I find exciting about this move by NVIDIA is the increased system stability we should get with AMD based systems. While I've been a longtime supporter of Intel, the nForce makes for a compelling alternative. With an estimated 40 million AMD processors expected to be sold this year, NVIDIA has once again found a new market to penetrate which is becoming a necessity in order to maintain their staggering rate of growth.

nForce based motherboards are expected to debut around the 3rd quarter of this year and NVIDIA has launch partnerships with Abit, Asus, Gigabyte, Mitac, and MSI. The nForce will come in four configurations giving motherboard makers and OEM's flexibility in building systems. Configurations consist of either a 64-bit (nForce220) or 128-bit (nForce420) IGP with or without the Dolby Digital 5.1 encoder. Note that the nForce220 which does not contain the crossbar memory architecture.

Additional documentation on the nForce can be found at NVIDIA's web site.

 

Last Updated on June 4, 2001

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