josiahsuarez
04-09-09, 06:02 PM
it's pretty huge :D
http://www.hardware.fr/articles/757-4/idf-printemps-2009-pekin.html
robot translation: http://74.125.45.132/translate_c?hl=en&ie=UTF-8&sl=fr&tl=en&u=http://www.hardware.fr/articles/757-4/idf-printemps-2009-pekin.html&prev=_t&usg=ALkJrhiH5mE4xMWQ_526jGPqhFc8b2FrqQ
Larrabee
http://xs138.xs.to/xs138/09154/pat_gelsinger_holding_larrabee_wafer834.jpg
Pat Gelsinger finished its keynote by Larrabee while first of all reconsidering the dedicated vectorial instruction set which was revealed the last month. This one should according to him fill all the developers and make it possible to draw the best from Larrabee with its instruction hundred new specific to the vectorial units 512 bits which will be in each cores of Larrabee.
In addition to this low-level language, Intel continues to develop Ct its high-level language intended to exploit the processors multicores and massively parallel. Intel is trustful in the fact that this language will become a standard excluded by the community of developers and showed very good figures on the level of the scalability is faculty to benefit from the additional cores. This so much on the level of CPUs multicores (Xeon dualcore vs X5570 quadcore vs Nehalem-EX octocores vs the future generation) that of Larrabee with a progression of the performances proportional to the number of cores (from 8 to 64).
During its keynote, Pat Gelsinger briefly left a wafer Larrabee, specifying that this one was indeed functional in the laboratories of Intel. A few seconds after this wafer had disappeared and was masked besides in the webcast published on the site of Intel. We could take a photograph of it, but unfortunately by far. It is in this situation that one regrets not being official Chinese sitting in the forefront!
We can nevertheless note on the photograph that the die is enormous, we can estimate it at roughly 600 mm ² on the basis of this wafer of 300mm of diameter is an order of magnitude similar to that of the GT200 of Nvidia manufactured in 65 nanometers and six times superior with that of Penryn dualcore.
Remain the question of the manufactoring process. A as imposing die lets to us think as Intel will not use its new manufactoring process 32 nanometers but rather the 45 nanometers, more especially as Pat Gelsinger specified that Intel will launch its first graphics card containing Larrabee at the end of this year or at the beginning of 2010. On another side the 32 nanometers could be necessary to Intel to strike extremely. 48 cores in 45? 64 cores in 32 nanometers? The bets for the first Larrabee generation are open.
http://www.hardware.fr/articles/757-4/idf-printemps-2009-pekin.html
robot translation: http://74.125.45.132/translate_c?hl=en&ie=UTF-8&sl=fr&tl=en&u=http://www.hardware.fr/articles/757-4/idf-printemps-2009-pekin.html&prev=_t&usg=ALkJrhiH5mE4xMWQ_526jGPqhFc8b2FrqQ
Larrabee
http://xs138.xs.to/xs138/09154/pat_gelsinger_holding_larrabee_wafer834.jpg
Pat Gelsinger finished its keynote by Larrabee while first of all reconsidering the dedicated vectorial instruction set which was revealed the last month. This one should according to him fill all the developers and make it possible to draw the best from Larrabee with its instruction hundred new specific to the vectorial units 512 bits which will be in each cores of Larrabee.
In addition to this low-level language, Intel continues to develop Ct its high-level language intended to exploit the processors multicores and massively parallel. Intel is trustful in the fact that this language will become a standard excluded by the community of developers and showed very good figures on the level of the scalability is faculty to benefit from the additional cores. This so much on the level of CPUs multicores (Xeon dualcore vs X5570 quadcore vs Nehalem-EX octocores vs the future generation) that of Larrabee with a progression of the performances proportional to the number of cores (from 8 to 64).
During its keynote, Pat Gelsinger briefly left a wafer Larrabee, specifying that this one was indeed functional in the laboratories of Intel. A few seconds after this wafer had disappeared and was masked besides in the webcast published on the site of Intel. We could take a photograph of it, but unfortunately by far. It is in this situation that one regrets not being official Chinese sitting in the forefront!
We can nevertheless note on the photograph that the die is enormous, we can estimate it at roughly 600 mm ² on the basis of this wafer of 300mm of diameter is an order of magnitude similar to that of the GT200 of Nvidia manufactured in 65 nanometers and six times superior with that of Penryn dualcore.
Remain the question of the manufactoring process. A as imposing die lets to us think as Intel will not use its new manufactoring process 32 nanometers but rather the 45 nanometers, more especially as Pat Gelsinger specified that Intel will launch its first graphics card containing Larrabee at the end of this year or at the beginning of 2010. On another side the 32 nanometers could be necessary to Intel to strike extremely. 48 cores in 45? 64 cores in 32 nanometers? The bets for the first Larrabee generation are open.