View Full Version : Marc Hamilton: FLOPS Almost Free With Intel‚??s AVX

03-07-12, 08:00 AM
HP‚??s Marc Hamilton writes that Intel‚??s AVX support on the new Xeon E5 is like getting half your FLOPS for free.

http://marchamilton.files.wordpress.com/2012/03/intel-xeon_e5_core.jpg?w=640 (http://marchamilton.wordpress.com/2012/03/06/flops-becoming-almost-free-with-intels-avx/)

Look closer at the above chip diagram. While the functional blocks are not drawn 100% to scale, you will still notice that the execution units, which include the AVX logic, actually take up a relatively small part of the processor. Much of the processor die is actually taken up by L1 and L2 cache and associated logic, out of order scheduling, and other advanced features that give the processor its overall performance and allows AVX to actually deliver double the number of FLOPS. On the Xeon E5-2600 HPC cluster that HP delivered to Purdue University back in October 2011, AVX in fact boosted Linpack performance from 149 GFLOPS/node (measured with AVX turned off) to 294 GFLOPS/node with AVX turned on and Intel‚??s MKL math library. That is pretty darn close to double.

Read the Full Story (http://marchamilton.wordpress.com/2012/03/06/flops-becoming-almost-free-with-intels-avx/).

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