MUYA
03-23-04, 08:05 AM
Here (http://translate.google.com/translate?sourceid=navclient-menuext&hl=en&u=http%3A%2F%2Fwww%2Eheise%2Ede%2Fnewsticker%2Fmel dung%2F45914) Nvidias NEXT generation chip NV40 sighted
On the fair could do c't a view of still under strict secrecy standing the NV40-Chip erhaschen, with which Nvidia wants to back-conquer the performance crown of ATI. The double power connections suggest increased requirements of electric current. With the Nvidia Referenzkarte was missing still the radiator, but the view of the memory chips was free, with which it acts around Samsungs slowest GDDR3-Variante for a MEMORY clock of 500 MHz. The sample is thus no Ultra execution, but the standard model of the NV40-Karte, with which the chip clock will be presumably clearly under 500 MHz.
Nevertheless diagram chip and memory do not come without a double current infusion over two external connections to the power pack estimate the capacity out c't on approximately 100 Watts with peak values of over 100 Watts. The diagram map reaches both values naturally only with applications with complex 3D-Grafik. With the Ultra version one can proceed with a storing act from 600 to 700 MHz and a chip clock from 500 MHz. The capacity of Nvidias new over flier lies thus again a piece more highly.
After the speculations, which are considered however meanwhile as relatively safe, circulating in the net, the NV40 manufactured at IBM contains 16 pipelines, which support the Shader specification 3,0. The 200 million transistors with a structure size of 0,13, necessary for it, µm obviously lead to a new record with the capacity.
With ATIs of TSMC manufactured competition chip R420 the rumor kitchen proceeds likewise from 0,13 µm-Strukturgroesse. Since the Canadians integrate probably only 12 pipelines, which besides only minimum beyond the Shader-2.0-Spezifikation to go are, are plausible in the net circulating the data of 160 million transistors. With same number of arithmetic and logic units in the pixel Shadern of the pipelines and same effectively usable memory range ATI could make up for the smaller number of pipelines by a chip clock higher around 33 per cent again. The capacity might move with ATI then in similar regions as with Nvidia. Which of the two chips brings most pixels per second on the screen, in addition, is still completely open with publication of the clock frequencies. Only one of the numerous unknown quantities is for example, whether Nvidias is sufficient efficient memory interface, in order all 16 pipelines with maximum speed run to let simultaneous to be able
On the fair could do c't a view of still under strict secrecy standing the NV40-Chip erhaschen, with which Nvidia wants to back-conquer the performance crown of ATI. The double power connections suggest increased requirements of electric current. With the Nvidia Referenzkarte was missing still the radiator, but the view of the memory chips was free, with which it acts around Samsungs slowest GDDR3-Variante for a MEMORY clock of 500 MHz. The sample is thus no Ultra execution, but the standard model of the NV40-Karte, with which the chip clock will be presumably clearly under 500 MHz.
Nevertheless diagram chip and memory do not come without a double current infusion over two external connections to the power pack estimate the capacity out c't on approximately 100 Watts with peak values of over 100 Watts. The diagram map reaches both values naturally only with applications with complex 3D-Grafik. With the Ultra version one can proceed with a storing act from 600 to 700 MHz and a chip clock from 500 MHz. The capacity of Nvidias new over flier lies thus again a piece more highly.
After the speculations, which are considered however meanwhile as relatively safe, circulating in the net, the NV40 manufactured at IBM contains 16 pipelines, which support the Shader specification 3,0. The 200 million transistors with a structure size of 0,13, necessary for it, µm obviously lead to a new record with the capacity.
With ATIs of TSMC manufactured competition chip R420 the rumor kitchen proceeds likewise from 0,13 µm-Strukturgroesse. Since the Canadians integrate probably only 12 pipelines, which besides only minimum beyond the Shader-2.0-Spezifikation to go are, are plausible in the net circulating the data of 160 million transistors. With same number of arithmetic and logic units in the pixel Shadern of the pipelines and same effectively usable memory range ATI could make up for the smaller number of pipelines by a chip clock higher around 33 per cent again. The capacity might move with ATI then in similar regions as with Nvidia. Which of the two chips brings most pixels per second on the screen, in addition, is still completely open with publication of the clock frequencies. Only one of the numerous unknown quantities is for example, whether Nvidias is sufficient efficient memory interface, in order all 16 pipelines with maximum speed run to let simultaneous to be able