View Full Version : SSE3 support with A64 90nm Winchester

09-28-04, 10:40 AM
Does anyone know if the new "winchester" core 939pin a64 will support SSE3? Or, if they tell me how to find out, I'll have one set-up in a week or so to look for myself.

Other improvements?:

* Full SSE3 implementation
* Improved hardware data prefetch mechanism
* Increased number of writing combine buffers (D0 stepping A64's can now combine up to four non-cacheable streams compared to 2 o*n the C0 and CG stepping A64's)
* Improved o*n-die memory controller with more advanced open page policy
* O*n-die thermal throttling
* Black Diamond Low-K technology (slower less power hungry transistors in less used sections and faster and more power hungry transistors in frequently used sections of the cpu)

Will it really support all these new features!? Or are they talking about the 90nm mobile athlon?

(By the way, sorry about going on an on about this new chip... mistakenly called san diego by me in another thread (L2 cache size difference and all that). I'm just pretty excited about it since I just bought it and it's on the way. WOOO! Finally going to have some A64 goodness)!

09-28-04, 11:12 AM
Nope or it's not picked up by CPU-Z.

09-28-04, 11:28 AM
Do you have this chip or what?

Not questioning you or anything... but I couldn't find one solid piece of evidence one way or another as of yet.


09-29-04, 01:29 AM
No but other people have as you can buy them check www.AMDzone.com

09-29-04, 04:04 AM
Apparently the next revision will have SSE3, along with some other things to reduce heat and what not.