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sillyeagle
09-28-05, 04:52 PM
Is it correct that in OCing a nForce4 board you force it to run an asynchronous memory timing? If so I assume that is less efficient, so I am wondering how much of an OC you need to make up the performace diffrence of the asynchronous timing.

Thanks,
Lance

superklye
09-28-05, 05:19 PM
nope, running asynchronus no longer impacts performance because there isn't really a FSB anymore. HTT works completely differently.

sillyeagle
09-28-05, 06:27 PM
nope, running asynchronus no longer impacts performance because there isn't really a FSB anymore. HTT works completely differently.

Ok cool, I'll have to research it a bit, not that familiar with the new AMD stuff. Thanks.

ViN86
09-28-05, 07:09 PM
its pretty simple. theres no more northbridge, now its on the CPU (the memory controller aspect, which is mainly the northbridge). the CPU communicates with the southbridge via the hyperthreading usually works at 1GHz (i believe its 1GHz up and down, so its theoretical 2GHz, someone confirm this)

the memory speeds are calculated using a divider on the CPU speed, thats why dividers read out as "CPU/x" where x is dependent on the ratio you set (varies with the CPU multi you have set and the divider you choose) so, thats why Athlon 64's tend to increase performance with lower latencies on the memory rather than faster speed.

its very impressive imo, that the athlon64 can keep up with ddr vs the pentium which is using insanely fast ddr2. cant wait til athlon64 moves to ddr2, that will be ridiculously fast.

superklye
09-28-05, 07:21 PM
its pretty simple. theres no more northbridge, now its on the CPU (the memory controller aspect, which is mainly the northbridge). the CPU communicates with the southbridge via the hyperthreading usually works at 1GHz (i believe its 1GHz up and down, so its theoretical 2GHz, someone confirm this)
*confirms*

sillyeagle
09-28-05, 10:02 PM
its pretty simple. theres no more northbridge, now its on the CPU (the memory controller aspect, which is mainly the northbridge). the CPU communicates with the southbridge via the hyperthreading usually works at 1GHz (i believe its 1GHz up and down, so its theoretical 2GHz, someone confirm this)

the memory speeds are calculated using a divider on the CPU speed, thats why dividers read out as "CPU/x" where x is dependent on the ratio you set (varies with the CPU multi you have set and the divider you choose) so, thats why Athlon 64's tend to increase performance with lower latencies on the memory rather than faster speed.

its very impressive imo, that the athlon64 can keep up with ddr vs the pentium which is using insanely fast ddr2. cant wait til athlon64 moves to ddr2, that will be ridiculously fast.


Sweet, thank you very much, that answers about all of it. lol

I'm a little rusty, but the southbridge runs all I/O functions other than memory, right? I see according to AMD the 939 pin runs at 2000MHz with 14.4GB total system bandwidth, which I believe is 6.4GB from CPU to memory plus 8GB from CPU through the southbridge for I/O functions. Does that sound right?

So I'm guessing to jump up to DDR2 it would require some other changes in the total CPU to system bandwidth of 14.4GB for an increase from CPU o memory.

http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_9485_9487%5E10248,00.html