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SH64
11-15-06, 07:29 PM
I'm looking for some technical details on the "16-way set associative L2 cache" .. like the one found on the Opteron servers.
http://www.amdboard.com/opteron_110105.html

What does the 16-way mean? :confused: I can't find any technical info or white paper on that subject.

SH0DAN
11-15-06, 08:55 PM
It basically means that any location in main memory can be cached in 16 different locations in L1.

http://devsearch.amd.com:8765/query.html?col=amdcom&col=devcent&qt=%2216+way+set+associative%22+%2B+%22opteron%22+ %2B+&charset=iso-8859-1


The following is a great resource....


http://www.freescale.com/files/32bit/doc/app_note/AN2663.pdf

SH0DAN
11-15-06, 09:05 PM
BTW....

Have you gone here ?.....


http://www.sandpile.org/ :D Oldie but a goodie.

SH64
11-16-06, 08:20 PM
Thanks SH0DAN :)
It basically means that any location in main memory can be cached in 16 different locations in L1.
i think that summerize it really well!