View Full Version : NV40 wishlist?
creedamd
03-20-03, 02:26 PM
I think the nv35 may just be alittle more peformance just to regain the crown. What would you want in an NV40?
1024bit mem bus
256-512mb Embedded ram
GFFX Flow2 hybrid silent liquid cooling solution
32 Pipes
Socketed CPU design
.09 die
16X SMQPAA and 32X SAF
Anti ATI fanATIc detection and deletion system
Built on Super Micro 150watt .25 mini Powersupply recharged through AGP port
Nude pinup of Dawn in every box
Originally posted by Slappi
Anti ATI fanATIc detection and deletion system
:lol2: :lol2: :lol2:
Seriously though, I think the list on the main page and the NV35 wish list thread has some pretty good suggestions already.
Improved Antialiasing Modes.
Gamma Correct FSAA.
16X Anisotropic Filtering.
True 128 Bit Color Precision.
Improved Shader Performance.
Improved and Not hacked-up Drivers.
Adaptive New or Improved Cooling Solution. No Dustbuster.
No more PR hyping.
:type:
nutball
03-20-03, 03:24 PM
Frame-buffer contents available as input to pixel shader. Or at the very least support for blending in floating-point buffers.
Everything else is a mere detail.
Admiral Horror
03-20-03, 03:49 PM
Originally posted by Slappi
1024bit mem bus
256-512mb Embedded ram
GFFX Flow2 hybrid silent liquid cooling solution
32 Pipes
Socketed CPU design
.09 die
16X SMQPAA and 32X SAF
Anti ATI fanATIc detection and deletion system
Built on Super Micro 150watt .25 mini Powersupply recharged through AGP port
Nude pinup of Dawn in every box
ROFLMAO!
Programmable Primitive Processor, possible multipass in the VS ( can write/read output to memory, thus )
Uttar
True 128 Bit Color Precision.
So NV 30 is not 128 bit true color precision
sebazve
03-20-03, 04:24 PM
oooohhh another wishlist :lol2:
ellroy80
03-20-03, 07:30 PM
I bet ya we'll see unified PS and VS.
GlowStick
03-20-03, 07:37 PM
I want 512MB DDR II 512bit bus
16MB Embeded Dram
4 Dvi outs wiht 4 DVI to regular converters
PCI-X
SLI "type" thing for up to 4 NV40's
.........
Pci X Yay!
well.... we arent gonna see 512mb vcards for a while... we barley need 128mb, let alone 256mb... not even 512mb... i know, u2 is probably the biggest memory hog ever.. and the textures take up like 110 or something... but 256 is double the standard now. i say 3-5 years we might see 512mb... plus ddrII memory would be hella expensive
i just want them to get the low k working... and up the clock speeds... 256bit bus is more than enough headroom for now... 512 would be nice:D
mikechai
03-20-03, 10:51 PM
Ok my turn.
GeForce FX2 6900 ultra 256MB GDDR3
Enhanced 0.11um process
500 MHz core speed
750 MHz GDDR3 (effective 1500MHz)
16MB embedded DRAM
256bit optimized memory bus
PCI-X or AGP interface
pseudo 16 pipelines (8x2 in color+z)
LMA 5 (8 crossbar memory controller)
Adaptive FSAA (different algorithm with different pixels) upto 16x
32x Anisotrophic filtering
8 vertex shaders
nBuster cooling system
.....
and last but not least ...
able to run 16 Dawn sisters smooth as silk, with or without clothes.
GlowStick
03-21-03, 02:22 AM
If they can reach 500mhz on .13 then id say 700mhz on the .11
Falkentyne
03-21-03, 03:46 AM
Didn't you guys know AGP slots do NOT support SLI (Multiple master devices?)
So why do you want a NV40 SLI ? It isn't possible unless the card is a PCI/66 card that fits in a AGP slot.
Lezmaka
03-21-03, 03:54 AM
The AGP 3.0 spec allows for multiple AGP devices.
nutball
03-21-03, 04:11 AM
Originally posted by Falkentyne
Didn't you guys know AGP slots do NOT support SLI (Multiple master devices?)
So why do you want a NV40 SLI ? It isn't possible unless the card is a PCI/66 card that fits in a AGP slot.
PCI-Express does allow multiple cards though, does it not? That's sort of NV40 timescale.
-=DVS=-
03-21-03, 05:26 AM
Originally posted by Slappi
1024bit mem bus
256-512mb Embedded ram
GFFX Flow2 hybrid silent liquid cooling solution
32 Pipes
Socketed CPU design
.09 die
16X SMQPAA and 32X SAF
Anti ATI fanATIc detection and deletion system
Built on Super Micro 150watt .25 mini Powersupply recharged through AGP port
Nude pinup of Dawn in every box
512 Bit memory bus (would be nice)
512 MB Embedded Ram (all the high AA modes flying :D)
stolen from Slappi
GFFX Flow2 hybrid silent liquid cooling solution
32 Pipes (overkill but what do i know would be nice anyways)
.09 process die (a must for future generations)
16x True AA not mixed crap 16x AF
Anti Hack Spam Hype revelation system :p
Build in Cold Fusion Generator doesn't need any external cords any more
Included Inflateble Nude Dawn doll :lol: could not resist
Originally posted by ellroy80
I bet ya we'll see unified PS and VS.
Yeah, I'd put £10,000 on that if they were taking bets. :cool:
Same goes for the programmable primatives/tesselation unit.
MuFu.
GlowStick
03-21-03, 12:37 PM
Originally posted by Falkentyne
Didn't you guys know AGP slots do NOT support SLI (Multiple master devices?)
So why do you want a NV40 SLI ? It isn't possible unless the card is a PCI/66 card that fits in a AGP slot.
Note my PCI-X before the SLI!
PCIX dose wonders.
Originally posted by MuFu
Yeah, I'd put £10,000 on that if they were taking bets. :cool:
Same goes for the programmable primatives/tesselation unit.
MuFu.
Nice amount of money, MuFu :D
BTW, do you know if the programmable primitive / tesselation unit will be part of the unified system, or be separate?
Right now, it's divided between VS & PS. Are they going to divide it between Unified Shading & Primitive Processor, or are they going to put everything in one powerful and highly flexible system?
Uttar
Chalnoth
03-21-03, 01:20 PM
1. Fully-virtualized vertex/fragment program memory (instruction count/constants/temporaries only limited by video memory).
2. Primitive processor.
3. Gamma-correct FSAA.
4. More pure texture filtering power (for better anisotropic performance without degrading image quality).
5. And, of course, PS/VS 3.0.
Originally posted by Uttar
BTW, do you know if the programmable primitive / tesselation unit will be part of the unified system, or be separate?
Not sure - I've been wondering that myself. Aren't tesselative/curve-extrapolating extensions a relatively straightforward subset of the OGL/D3D schema (specifically vertex processing)?
Makes you wonder how far they are going to take the idea initially - the kind of processing power required to provide realtime extrapolation right down to the sub-pixel level suggests a dedicated engine to me. I just hope software support for the feature is there when R400 and NV40 debut.
MuFu.
P.S. Chalnoth - if those are your 5 "requests", you are really going to like NV40 dude. :cool:
Originally posted by MuFu
Not sure - I've been wondering that myself. Aren't tesselative/curve-extrapolating extensions a relatively straightforward subset of the OGL/D3D schema (specifically vertex processing)?
Makes you wonder how far they are going to take the idea initially - the kind of processing power required to provide realtime extrapolation right down to the sub-pixel level suggests a dedicated engine to me. I just hope software support for the feature is there when R400 and NV40 debut.
Well, yes, but it's fairly evident that the software support WON'T be there when R400 & NV40 debut.
That would mean that dedicating much silicon to it with a dedicated engine wouldn't make much sense, IMO. Of course, nVidia's / ATI's reasoning might have been different.
And yet another stupid question...
Can the NV40 run different programs on pixels in a same polygon? David Kirk hinted to that by saying "We don't yet have the ability to..." at the NV30 launch. Of course, he could be hinting for it with the NV50...
If the NV40 could do that, then it sounds like the NV30 is the world's least ambitious project ever in comparaison to it.
Uttar
Originally posted by Uttar
Well, yes, but it's fairly evident that the software support WON'T be there when R400 & NV40 debut.
Either way, the demos are gonna rock. :D
That would mean that dedicating much silicon to it with a dedicated engine wouldn't make much sense, IMO.
Yeah, but I doubt they want to include yet another *new* feature that is unuseable because of the performance hit. The case with FP32 is almost acceptable because it is beneficial to offline rendering, but adaptive tesselation is primarily a realtime tech.
And yet another stupid question...
Can the NV40 run different programs on pixels in a same polygon?
Not sure, sorry (why is that a stupid question?!).
What do you think about the prospect of less than one mapping unit per pipe?
MuFu.
Originally posted by MuFu
Either way, the demos are gonna rock. :D
[b]
Yeah, but I doubt they want to include yet another *new* feature that is unuseable because of the performance hit. The case with FP32 is almost acceptable because it is beneficial to offline rendering, but adaptive tesselation is primarily a realtime tech.
Not sure, sorry (why is that a stupid question?!).
What do you think about the prospect of less than one mapping unit per pipe?
MuFu.
You got a point there. But I'd guess the first generation of primitive processors won't be very powerful, and not amazingly flexible. So yeah, it would make no sense to use highly flexible units for it... Doing a lot of tesselation might be overkill, too.
As to why it's a stupid question... Well, it's very unlikely, because it would be fairly amazing ( mostly from the technical achivement point of view ) - asking it is pretty much useless, since it's most likely no.
Less than 1 TMU/pipe makes sense. Since both VS & PS need TMUs, but that there are going to be many VS that don't use textures ( and some PS too, but that's a lot rarer )
Thanks for the info, BTW :)
Uttar
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