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Old 12-11-07, 01:46 PM   #3
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Join Date: Jan 2007
Posts: 468
Default Re: QX6700 & Maximus Formula SE OC Question

Yeah I was planning on updating the BIOS, just haven't decided which one is the best. I see over on extremeoverclockers that 902 is what they are saying is good atm. So I just decided to give this one a spin and see what I could do with it before I updated.

Timings are stock 5-5-5-15

I haven't played around with these yet.

It ran 13.9 seconds on Multi CPU Render test for CineBench

New Settings:
Lowered CPUv to 1.468
Added DRAM settings... at 5-5-5-12

This is stable for all afternoon now. Haven't done Prime or anything like that yet.
Strange that this gave me a slightly lower 3DMark06 score of 13008
Runs 13.8 seconds on Multi CPU Render test for CineBench
But Everest Memory Bench was better...
Latency: Memory - 60.2ns, L1 Cache - 0.8ns, L2 Cache - 3.8ns
CPU Temps now idle at 28c

Ai Overclock Tuner [Manual]
OC From CPU Level Up [Auto]
CPU Ratio Control [Manual]
Ratio CMOS Setting: [9]
FSB Frequency [400]
FSB Strap to North Bridge [400MHz]
PCIE Frequency [100]
DRAM Settings
DRAM Frequency [Auto]
DRAM Command Rate [2T]
DRAM Timing Control [manual]
CAS# Latency [5]
RAS# to CAS Delay [5]
RAS# Precharge [5]
RAS# Active Time [12]
RAS# To Ras# Delay [3]
Row Refresh Cycle Time [42]
Write Recovery Time [6]
Read To Precharge Time [3]
Read To Write Delay(S/D) [8]
Write To Read Delay(S) [3]
Write To Read Delay(D) [5]
Read To Read Delay(S) [4]
Read To Read Delay(D) [6]
Write To Write Delay(S) [4]
Write To Write Delay(D) [6]
DRAM Static Read Control [Disabled]
Ai Clock Twister [Light]
Transaction Booster [Enabled]
Boost Level [0]
Voltage Settings
CPU Voltage [1.468v]
CPU PLL Voltage [Auto]
North Bridge Voltage [1.49v]
DRAM Voltage [2.1v]
FSB Termination Voltage [1.4v]
South Bridge Voltage [Auto]
Loadline Calibration [Enabled]
CPU GTL Reference [0.63x]
North Bridge GTL Reference [0.67x]
DDR2 Channel A REF Voltage [Auto]
DDR2 Channel B REF Voltage [Auto]
DDR2 Controller REF Voltage [DDR2_REF]
SB 1.5V Voltage [Auto]
CPU Spread Spectrum [Disabled]
PCIE Spread Spectrum [Disabled]
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