Originally Posted by mythy
could you please explain this to me in detail? I am very interested in this topic to say the least
Supposedly your tRAS timing is supposed to be the sum of your CAS latency, tRCD, plus 2. I never heard of it. All I know is that the tighter the tRAS, the better the performance, but if it's too tight, the memory cycle will finish too soon and become unstable. I don't know where the plus 2 came from either.