Originally Posted by etherfish
1263: 10 4434 11219 146033543 PCI-MSI-edge eth0
1264: 35 4328 112565 3247738 PCI-MSI-edge eth0
1265: 40 7271 164638 4115946 PCI-MSI-edge eth0
I assume that the different interrupts correspond to different types of events and have different priorities.
A typical split i have frequently observed would be: transmission (TX-IRQ),
reception (RX-IRQ) and error case / state change (ERR-IRQ) - but i don't
think this is the case for your hardware, above.
The advantage of split MSIs over a single IRQ per device is that the driver
ISR doesn't need to check which type of event happened and then needs to
call the appropriate "sub-ISR" - the driver simply installs several ISRs
associated with the events, thus saving a few CPU cycles.