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Old 01-05-09, 11:00 AM   #3
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Join Date: Jun 2004
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Default Re: Nvidia's 40nm GT212 to have 384 SPs, 96 TMUs, and 256-bit 7Gbps GDDR5

Originally Posted by Roliath View Post
Can someone explain why it will only have 256bit memory interface though?
The higher bandwidth provided by GDDR5 offsets the need for a wider bus. Simpler design means lower manufacturing costs for nvidia as well. That's the basic reason.
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