Re: the truth about MTRR's and PAT?
1. the PAT complements the MTRRs, it does not replace them completely; for more information, please see e.g. the IA-32 Intel® Architecture Software Developer’s Manual Volume 3: System Programming Guide.
2. write-back entries are required to mark address ranges write-back cacheable (e.g. RAM); uncacheable entries are needed to create uncacheable ranges in larger write-back ranges, e.g. for I/O apertures. Address ranges that do not have an MTRR associated with them default to uncacheable.
3. if you are using the NVIDIA Linux graphics driver, you do not need to manually configure MTRRs, the driver will take the steps necessary to ensure mappings of both system memory and GPU BARs have the correct memory types.
4. BAR0 is the register aperture, BAR1 and BAR2 are driver configurable apertures (BAR1 maps to video memory by default).
5. due to the way the PAT works, there's no user-visible configuration interface.