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Old 01-16-03, 05:07 PM   #3
ernestus
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Join Date: Oct 2002
Location: London & Seville
Posts: 23
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Ok, I was wrong, what I said is true in my gcc version. here go two useful links:

here is a discussion about the subject:
http://compilers.iecc.com/comparch/index/2002-05

look for the MMX/3Dnow!/SSE/SSE2 compilers thread. As you can see, SSE2 instructions may take longer than FPU instructions.

And here there is a depiction of what can you expect:
http://www.andrew.cmu.edu/~komarek/w...leskyPerf.html

I realize x86 architecture is not appropiated for number crunching (look at the great results of the humble G3 300MHz Apple iBook)

Bye
E.
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Last edited by ernestus; 01-16-03 at 05:24 PM.
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