Originally Posted by netllama
According to the EDID in your DFP, it requires a 162Mhz pixelclock to run at its native 1600x1200 resolution. Your videocard is only capable of driving it at a 135Mhz pixelclock. In other words, you cannot drive the DFP at its EDID specific 1600x1200 mode in your current setup.
This is true, though the lower pixelclock modeline does work for the LCD if both the CRT and the LCD are set to use it. When the CRTs modeline is changed to use a higher pixelclock, the LCD will go into powersaver mode (but the CRT will display using the designated modeline). Note: see below
Is your DFP plugged into the primary or secondary CRT controller? Have you tried swapping them?
Aha! My DFP was connected to the primary monitor connector ("1" using the DVI Y cable that apparently was supplied with this fx5200). I swapped the monitors and after changing CRT-1 and DFP-0 to CRT-0 and DFP-1, the custom modelines worked as they should! I was able to use the dfp modeline for the lcd, and the crt modeline for the crt without incedent. I further removed the custom modelines, commented out the ignoreEDID option, and tried using 'Option "MetaModes" "1600x1200, 1600x1200". This also worked correctly. The "NoPowerConnectorCheck" and "Coolbits" options do not appear to have any effect as far as this problem is concerned.
Btw, the modeline I tried was posted on this forum in one of the past discussions about pixel clock detection issues.
I'm satisfied with the result, though I do have a couple of questions:
1) does the problem have anything to do with the drivers always picking up the CRT monitor as being the primary display even if the CRT is plugged into the "2nd" dvi connector and the LCD into the first? Is this a hardware limitation or a bug with the drivers?
2) After swapping the two monitors, the pixel clock for the DFP is still limited to 135MHz. How is it that the card can now drive that monitor at 1600x1200@60Hz using the EDID provided mode? It seems as though this shouldn't work as it expects to be driven using a 162MHz pixelclock based one what you've said above.