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Old 06-19-08, 03:13 PM   #1
DSC
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Default 55nm G92b die-shot @ PCPer

http://www.pcper.com/comments.php?nid=5817

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By my crude measurements, the 55nm die is 15.2mm high, or 231 mm^2 in comparison to the 65nm G92's die area of 324mm^2 - a savings of approximately 40%.
Damn, Nvidia should have gone with 55nm for GT200 in the first place. Now I really want to see how much can be saved on GT200b's die space.
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Old 06-19-08, 03:21 PM   #2
Bman212121
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Default Re: 55nm G92b die-shot @ PCPer

http://nvnews.net/vbulletin/showthread.php?t=115048
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Old 06-19-08, 04:48 PM   #3
Ninja Prime
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Default Re: 55nm G92b die-shot @ PCPer

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Originally Posted by DSC View Post
http://www.pcper.com/comments.php?nid=5817



Damn, Nvidia should have gone with 55nm for GT200 in the first place. Now I really want to see how much can be saved on GT200b's die space.
That doesnt seem right, I would think his math is off. 55nm is only a 19% shrink as I recall.
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Old 06-19-08, 05:10 PM   #4
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Default Re: 55nm G92b die-shot @ PCPer

The 55nm process is for transistor sizes only right? Are these the only components etched into the die?
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