55nm G92b die-shot @ PCPer

DSC · 06-19-08, 03:13 PM

http://www.pcper.com/comments.php?nid=5817

Quote:

By my crude measurements, the 55nm die is 15.2mm high, or 231 mm^2 in comparison to the 65nm G92's die area of 324mm^2 - a savings of approximately 40%.

Damn, Nvidia should have gone with 55nm for GT200 in the first place. Now I really want to see how much can be saved on GT200b's die space.

Bman212121 · 06-19-08, 03:21 PM

http://nvnews.net/vbulletin/showthread.php?t=115048

Ninja Prime · 06-19-08, 04:48 PM

Quote:

Originally Posted by DSC

http://www.pcper.com/comments.php?nid=5817

Damn, Nvidia should have gone with 55nm for GT200 in the first place. Now I really want to see how much can be saved on GT200b's die space.

That doesnt seem right, I would think his math is off. 55nm is only a 19% shrink as I recall.

mojoman0 · 06-19-08, 05:10 PM

The 55nm process is for transistor sizes only right? Are these the only components etched into the die?

06-19-08, 03:21 PM	#2
Bman212121 Registered User Join Date: Jan 2006 Posts: 6,726	Re: 55nm G92b die-shot @ PCPer http://nvnews.net/vbulletin/showthread.php?t=115048

06-19-08, 05:10 PM	#4
mojoman0 Registered User Join Date: Mar 2006 Location: California Posts: 3,566	Re: 55nm G92b die-shot @ PCPer The 55nm process is for transistor sizes only right? Are these the only components etched into the die?